
PIC18F46J50 FAMILY
DS39931D-page 124
2011 Microchip Technology Inc.
REGISTER 9-8:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 (ACCESS FA0h)
R/W-0
OSCFIE
CM2IE
CM1IE
USBIE
BCL1IE
HLVDIE
TMR3IE
CCP2IE
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIE:
Oscillator Fail Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 6
CM2IE:
Comparator 2 Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 5
CM1IE:
Comparator 1 Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 4
USBIE:
USB Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 3
BCL1IE:
Bus Collision Interrupt Enable bit (MSSP1 module)
1
= Enabled
0
= Disabled
bit 2
HLVDIE:
High/Low-Voltage Detect Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 1
TMR3IE:
TMR3 Overflow Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 0
CCP2IE:
ECCP2 Interrupt Enable bit
1
= Enabled
0
= Disabled